71 lines
1.7 KiB
C
71 lines
1.7 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright (c) 2023 NVIDIA Corporation & Affiliates
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*/
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#ifndef RTE_IB_H
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#define RTE_IB_H
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/**
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* @file
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*
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* InfiniBand headers definitions
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*
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* The infiniBand headers are used by RoCE (RDMA over Converged Ethernet).
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*/
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#include <stdint.h>
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#include <rte_byteorder.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* InfiniBand Base Transport Header according to
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* IB Specification Vol 1-Release-1.4.
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*/
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__extension__
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struct rte_ib_bth {
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uint8_t opcode; /**< Opcode. */
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#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
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uint8_t tver:4; /**< Transport Header Version. */
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uint8_t padcnt:2; /**< Pad Count. */
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uint8_t m:1; /**< MigReq. */
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uint8_t se:1; /**< Solicited Event. */
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#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
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uint8_t se:1; /**< Solicited Event. */
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uint8_t m:1; /**< MigReq. */
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uint8_t padcnt:2; /**< Pad Count. */
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uint8_t tver:4; /**< Transport Header Version. */
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#endif
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rte_be16_t pkey; /**< Partition key. */
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#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
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uint8_t rsvd0:6; /**< Reserved. */
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uint8_t b:1; /**< BECN. */
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uint8_t f:1; /**< FECN. */
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#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
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uint8_t f:1; /**< FECN. */
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uint8_t b:1; /**< BECN. */
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uint8_t rsvd0:6; /**< Reserved. */
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#endif
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uint8_t dst_qp[3]; /**< Destination QP */
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#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
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uint8_t rsvd1:7; /**< Reserved. */
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uint8_t a:1; /**< Acknowledge Request. */
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#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
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uint8_t a:1; /**< Acknowledge Request. */
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uint8_t rsvd1:7; /**< Reserved. */
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#endif
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uint8_t psn[3]; /**< Packet Sequence Number */
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} __rte_packed;
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/** RoCEv2 default port. */
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#define RTE_ROCEV2_DEFAULT_PORT 4791
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#ifdef __cplusplus
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}
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#endif
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#endif /* RTE_IB_H */
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